Q1. Could you start by giving us a brief overview of your professional background, particularly focusing on your expertise in the industry?

I have been in the semiconductor industry for more than 26 years, and I’ve done both design, electronic design automation, and manufacturing. I’ve been involved in advanced note designing as well as Legacy note design from Ali in my career. I’ve also been involved in semiconductor manufacturing while working with TSMC, and Ben has been involved in both front and manufacturing, as well as advanced packaging back and manufacturing. I’ve also been involved in electronic design automation software support, development, execution, and deployment of AI for design efficiency, improvement, and manufacturing. I also have advanced node manufacturing equipment, requirements, deployment, R&D, etc.

Q2. What structural shifts are you seeing in customer demand between leading-edge nodes (3nm/5nm) and mature nodes, especially in a cost-constrained environment?

Key shift: AI demand is creating a bifurcated market— frothy at leading-edge for AI chips, while mature nodes serve critical automotive/industrial applications with sustained demand. I am seeing the structure shift of major, big semiconductor fabless companies that are working on performance and power improvement, focusing on advanced leading node 3nm/5nm, whereas Compla, which is working on legacy nodes like the automotive domain, defense domain, and analog signal domain, is trying to improve the overall efficiency and cost optimization.

Q3. How is the increasing reliance on EUV and advanced lithography techniques changing the competitive dynamics among foundries?

EUV-based lithographic equipment supplied by ASML is the sole provider of advanced lithographic techniques used by TSMC, Samsung, and Intel, who are working in advance. Note manufacturing where this equipment is being utilized. This equipment is extremely costly, and a lot of optimization techniques are being utilized in order to increase the efficiency of the equipment.

Q4. How do you see AI influencing foundry operations such as capacity planning, predictive maintenance, and pricing models?

Both productive as well as Agentic AI are being utilized in foundry operations in order to improve the capacity planning, predictive maintenance, and also reactive maintenance, and over our price modeling, TSMC is already using this, and Samsung and Intel are also following and creating LLM-based agentic models.

Q5. How are decarbonization goals influencing semiconductor manufacturing, particularly in energy-intensive fabs?

The decarbonization challenge lies upstream in the supply chain; we must turn suppliers green to slash GHG emissions.

A high-reliability energy supply is required alongside decarbonization goals.

Semiconductor manufacturing is extremely water-intensive; sustainability adds constraint.

Companies with announced net-zero goals must deliver; the industry needs plans to reduce GHG without delaying innovation.

Data centers/fabs have growing power needs while facing climate targets—companies must surmount power/sustainability challenges to meet computing demand.

Q6. What role do advanced packaging and chiplet architectures play in unlocking new business opportunities for design service providers?

Chiplets + hybrid bonding enable larger/faster AI & HPC systems. Strong packaging growth fueled by AI-specific requirements for power, automation, and energy efficiency, driven by HBM4 requirements.

Glass substrates, copper-to-copper hybrid bonding, and panel-level packaging define the next decade.

Q7. If you were an investor looking at companies within the space, what critical question would you pose to their senior management?

I would be specific, focusing on fabrication, efficiency improvement, including yield targets, cost optimization, as well as a new Innovative method to reduce overall emissions and improve the carbon footprint.